A user typically identifies bit cells, bit line connections, and word line connections by studying the schematics of a circuit block. A problem with this conventional solution is that the schematics are not always available to third-party users. Even if the schematics are available, it can be tedious to trace and identify all of the bit cells, bit line connections, and word line connections within a complex memory circuit block.
Another conventional solution is for a user to identify bit cells, bit line connections, and word line connections by studying names in a netlist. However, a problem with this conventional solution is that the names of the bit cells, bit line connections, and word line connections are typically not available in a netlist and cannot be determined. Generally, there is not a good solution to this problem today in that the known solutions are tedious or unreliable.
Accordingly, what is needed is an improved system and method for identifying memory bit cells and connections. The system and method should be simple, cost effective, and capable of being easily adapted to existing technology. The present invention addresses such a need.